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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/jce/PengMTYC23>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Adrian_Marotzke>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Bo-Yin_Yang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Bo-Yuan_Peng>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ho-Lin_Chen>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ming-Han_Tsai>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1007%2Fs13389-022-00303-z>
foaf:homepage <https://doi.org/10.1007/s13389-022-00303-z>
dc:identifier DBLP journals/jce/PengMTYC23 (xsd:string)
dc:identifier DOI doi.org%2F10.1007%2Fs13389-022-00303-z (xsd:string)
dcterms:issued 2023 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/jce>
rdfs:label Streamlined NTRU Prime on FPGA. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Adrian_Marotzke>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Bo-Yin_Yang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Bo-Yuan_Peng>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ho-Lin_Chen>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ming-Han_Tsai>
swrc:month June (xsd:string)
swrc:number 2 (xsd:string)
swrc:pages 167-186 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/jce/PengMTYC23/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/jce/PengMTYC23>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/jce/jce13.html#PengMTYC23>
rdfs:seeAlso <https://doi.org/10.1007/s13389-022-00303-z>
dc:title Streamlined NTRU Prime on FPGA. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 13 (xsd:string)