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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/jco/LuoAV08>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Anthony_Vannelli>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Chaomin_Luo>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Miguel_F._Anjos>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1007%2Fs10878-008-9148-y>
foaf:homepage <https://doi.org/10.1007/s10878-008-9148-y>
dc:identifier DBLP journals/jco/LuoAV08 (xsd:string)
dc:identifier DOI doi.org%2F10.1007%2Fs10878-008-9148-y (xsd:string)
dcterms:issued 2008 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/jco>
rdfs:label A nonlinear optimization methodology for VLSI fixed-outline floorplanning. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Anthony_Vannelli>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Chaomin_Luo>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Miguel_F._Anjos>
swrc:number 4 (xsd:string)
swrc:pages 378-401 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/jco/LuoAV08/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/jco/LuoAV08>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/jco/jco16.html#LuoAV08>
rdfs:seeAlso <https://doi.org/10.1007/s10878-008-9148-y>
dc:subject Circuit layout design; VLSI floorplanning; Facility layout; Combinatorial optimization; Global optimization; Convex programming (xsd:string)
dc:title A nonlinear optimization methodology for VLSI fixed-outline floorplanning. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 16 (xsd:string)