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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/jcp/ShiLJY08>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Kaijian_Shi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Lin_Yuan>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yi-Min_Jiang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Zhian_Lin>
foaf:homepage <http://dx.doi.org/doi.org%2F10.4304%2Fjcp.3.3.6-13>
foaf:homepage <https://doi.org/10.4304/jcp.3.3.6-13>
dc:identifier DBLP journals/jcp/ShiLJY08 (xsd:string)
dc:identifier DOI doi.org%2F10.4304%2Fjcp.3.3.6-13 (xsd:string)
dcterms:issued 2008 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/jcp>
rdfs:label Simultaneous Sleep Transistor Insertion and Power Network Synthesis for Industrial Power Gating Designs. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Kaijian_Shi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Lin_Yuan>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yi-Min_Jiang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Zhian_Lin>
swrc:number 3 (xsd:string)
swrc:pages 6-13 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/jcp/ShiLJY08/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/jcp/ShiLJY08>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/jcp/jcp3.html#ShiLJY08>
rdfs:seeAlso <https://doi.org/10.4304/jcp.3.3.6-13>
dc:title Simultaneous Sleep Transistor Insertion and Power Network Synthesis for Industrial Power Gating Designs. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 3 (xsd:string)