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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/jcsc/KhairnarCSJ22a>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Amit_M._Joshi_0001>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Avadhoot_Khairnar>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Bhavuk_Chauhan>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Geetanjali_Sharma>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1142%2FS0218126622920013>
foaf:homepage <https://doi.org/10.1142/S0218126622920013>
dc:identifier DBLP journals/jcsc/KhairnarCSJ22a (xsd:string)
dc:identifier DOI doi.org%2F10.1142%2FS0218126622920013 (xsd:string)
dcterms:issued 2022 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/jcsc>
rdfs:label Erratum: High-Performance 32-Bit Parallel Hybrid Adder Design Using RNS and Hybrid PTL/CMOS Logic. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Amit_M._Joshi_0001>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Avadhoot_Khairnar>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Bhavuk_Chauhan>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Geetanjali_Sharma>
swrc:month December (xsd:string)
swrc:number 18 (xsd:string)
swrc:pages 2292001:1-2292001:2 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/jcsc/KhairnarCSJ22a/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/jcsc/KhairnarCSJ22a>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/jcsc/jcsc31.html#KhairnarCSJ22a>
rdfs:seeAlso <https://doi.org/10.1142/S0218126622920013>
dc:title Erratum: High-Performance 32-Bit Parallel Hybrid Adder Design Using RNS and Hybrid PTL/CMOS Logic. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 31 (xsd:string)