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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/jcsc/RaoNGM16>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Avijit_Mathur>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ian_Andrew_Grout>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Muzaffar_Rao>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Thomas_Newe>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1142%2FS0218126616500699>
foaf:homepage <https://doi.org/10.1142/S0218126616500699>
dc:identifier DBLP journals/jcsc/RaoNGM16 (xsd:string)
dc:identifier DOI doi.org%2F10.1142%2FS0218126616500699 (xsd:string)
dcterms:issued 2016 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/jcsc>
rdfs:label High Speed Implementation of a SHA-3 Core on Virtex-5 and Virtex-6 FPGAs. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Avijit_Mathur>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ian_Andrew_Grout>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Muzaffar_Rao>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Thomas_Newe>
swrc:number 7 (xsd:string)
swrc:pages 1650069:1-1650069:13 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/jcsc/RaoNGM16/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/jcsc/RaoNGM16>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/jcsc/jcsc25.html#RaoNGM16>
rdfs:seeAlso <https://doi.org/10.1142/S0218126616500699>
dc:title High Speed Implementation of a SHA-3 Core on Virtex-5 and Virtex-6 FPGAs. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 25 (xsd:string)