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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/jetc/LiBGR08>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Aditya_Bansal>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jing_Li_0073>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Kaushik_Roy_0001>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Swaroop_Ghosh>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F1389089.1389093>
foaf:homepage <https://doi.org/10.1145/1389089.1389093>
dc:identifier DBLP journals/jetc/LiBGR08 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F1389089.1389093 (xsd:string)
dcterms:issued 2008 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/jetc>
rdfs:label An alternate design paradigm for low-power, low-cost, testable hybrid systems using scaled LTPS TFTs. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Aditya_Bansal>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jing_Li_0073>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Kaushik_Roy_0001>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Swaroop_Ghosh>
swrc:number 3 (xsd:string)
swrc:pages 13:1-13:19 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/jetc/LiBGR08/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/jetc/LiBGR08>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/jetc/jetc4.html#LiBGR08>
rdfs:seeAlso <https://doi.org/10.1145/1389089.1389093>
dc:subject 3D integration, BIST, DFT, Low-temperature polycrystalline silicon (LTPS), generic, grain boundary (GB), hybrid system, inherent variation, reconfigurable, thin-film transistor (TFT) (xsd:string)
dc:title An alternate design paradigm for low-power, low-cost, testable hybrid systems using scaled LTPS TFTs. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 4 (xsd:string)