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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/jetc/ManemRR12>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Garrett_S._Rose>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Harika_Manem>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jeyavijayan_Rajendran>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F2093145.2093151>
foaf:homepage <https://doi.org/10.1145/2093145.2093151>
dc:identifier DBLP journals/jetc/ManemRR12 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F2093145.2093151 (xsd:string)
dcterms:issued 2012 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/jetc>
rdfs:label Design Considerations for Multilevel CMOS/Nano Memristive Memory. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Garrett_S._Rose>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Harika_Manem>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jeyavijayan_Rajendran>
swrc:number 1 (xsd:string)
swrc:pages 6:1-6:22 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/jetc/ManemRR12/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/jetc/ManemRR12>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/jetc/jetc8.html#ManemRR12>
rdfs:seeAlso <https://doi.org/10.1145/2093145.2093151>
dc:title Design Considerations for Multilevel CMOS/Nano Memristive Memory. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 8 (xsd:string)