High-level interconnect model for the quantum logic array architecture.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/jetc/MetodiTCCC08
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High-level interconnect model for the quantum logic array architecture.
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dc:
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QLA, Quantum computer architecture design, fault tolerance, large scale, quantum, teleportation
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High-level interconnect model for the quantum logic array architecture.
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