Integrating Parallelizing Compilation Technology and Processor Architecture for Cost-Effective Concurrent multithreading.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/jise/TsaiJLLWYZS98
Home
|
Example Publications
Property
Value
dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/journals/jise/TsaiJLLWYZS98
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Bixia_Zheng
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/David_J._Lilja
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Jenn-Yuan_Tsai
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Pen-Chung_Yew
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Stephen_J._Schwinn
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Xin_Wang
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Zhenzhen_Jiang
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Zhiyuan_Li_0001
>
foaf:
homepage
<
http://www.iis.sinica.edu.tw/page/jise/1998/199803_09.html
>
dc:
identifier
DBLP journals/jise/TsaiJLLWYZS98
(xsd:string)
dcterms:
issued
1998
(xsd:gYear)
swrc:
journal
<
https://dblp.l3s.de/d2r/resource/journals/jise
>
rdfs:
label
Integrating Parallelizing Compilation Technology and Processor Architecture for Cost-Effective Concurrent multithreading.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Bixia_Zheng
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/David_J._Lilja
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Jenn-Yuan_Tsai
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Pen-Chung_Yew
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Stephen_J._Schwinn
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Xin_Wang
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Zhenzhen_Jiang
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Zhiyuan_Li_0001
>
swrc:
number
1
(xsd:string)
swrc:
pages
205-222
(xsd:string)
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/journals/jise/TsaiJLLWYZS98/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/journals/jise/TsaiJLLWYZS98
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/journals/jise/jise14.html#TsaiJLLWYZS98
>
rdfs:
seeAlso
<
http://www.iis.sinica.edu.tw/page/jise/1998/199803_09.html
>
dc:
title
Integrating Parallelizing Compilation Technology and Processor Architecture for Cost-Effective Concurrent multithreading.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:Article
rdf:
type
foaf:Document
swrc:
volume
14
(xsd:string)