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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/jolpe/KurianRPKR09>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/George_Kurian>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Narayana_Rao>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Srivaths_Ravi_0001>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/V._Kamakoti_0001>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Virendra_Patidar>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1166%2Fjolpe.2009.1001>
foaf:homepage <https://doi.org/10.1166/jolpe.2009.1001>
dc:identifier DBLP journals/jolpe/KurianRPKR09 (xsd:string)
dc:identifier DOI doi.org%2F10.1166%2Fjolpe.2009.1001 (xsd:string)
dcterms:issued 2009 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/jolpe>
rdfs:label Test Power Reduction Using Integrated Scan Cell and Test Vector Reordering Techniques on Linear Scan and Double Tree Scan Architectures. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/George_Kurian>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Narayana_Rao>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Srivaths_Ravi_0001>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/V._Kamakoti_0001>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Virendra_Patidar>
swrc:number 1 (xsd:string)
swrc:pages 58-68 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/jolpe/KurianRPKR09/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/jolpe/KurianRPKR09>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/jolpe/jolpe5.html#KurianRPKR09>
rdfs:seeAlso <https://doi.org/10.1166/jolpe.2009.1001>
dc:title Test Power Reduction Using Integrated Scan Cell and Test Vector Reordering Techniques on Linear Scan and Double Tree Scan Architectures. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 5 (xsd:string)