Low Power and High Performance Arithmetic Circuits in Feedthrough CMOS Logic Family for Low Power Applications. | D2R Server publishing the DBLP Bibliography Database, hosted at L3S Research Center

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dcterms:bibliographicCitation	<http://dblp.uni-trier.de/rec/bibtex/journals/jolpe/Navarro-BotelloMN06>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Juan_A._Montiel-Nelson>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Saeid_Nooshabadi>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Victor_Navarro-Botello>
foaf:homepage	<http://dx.doi.org/doi.org%2F10.1166%2Fjolpe.2006.066>
foaf:homepage	<https://doi.org/10.1166/jolpe.2006.066>
dc:identifier	DBLP journals/jolpe/Navarro-BotelloMN06 (xsd:string)
dc:identifier	DOI doi.org%2F10.1166%2Fjolpe.2006.066 (xsd:string)
dcterms:issued	2006 (xsd:gYear)
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rdfs:label	Low Power and High Performance Arithmetic Circuits in Feedthrough CMOS Logic Family for Low Power Applications. (xsd:string)
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Juan_A._Montiel-Nelson>
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Saeid_Nooshabadi>
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Victor_Navarro-Botello>
swrc:number	2 (xsd:string)
swrc:pages	300-307 (xsd:string)
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rdfs:seeAlso	<https://doi.org/10.1166/jolpe.2006.066>
dc:title	Low Power and High Performance Arithmetic Circuits in Feedthrough CMOS Logic Family for Low Power Applications. (xsd:string)
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