Pipelining a memory based CISC processor.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/jsa/SmeetsWS90
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dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/journals/jsa/SmeetsWS90
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/J._P._C._F._H._Smeets
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/M._P._J._Stevens
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Willem_J._Withagen
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1016%2F0165-6074%2890%2990315-Z
>
foaf:
homepage
<
https://doi.org/10.1016/0165-6074(90)90315-Z
>
dc:
identifier
DBLP journals/jsa/SmeetsWS90
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1016%2F0165-6074%2890%2990315-Z
(xsd:string)
dcterms:
issued
1990
(xsd:gYear)
swrc:
journal
<
https://dblp.l3s.de/d2r/resource/journals/jsa
>
rdfs:
label
Pipelining a memory based CISC processor.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/J._P._C._F._H._Smeets
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/M._P._J._Stevens
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Willem_J._Withagen
>
swrc:
number
1-5
(xsd:string)
swrc:
pages
665-672
(xsd:string)
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/journals/jsa/SmeetsWS90/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/journals/jsa/SmeetsWS90
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/journals/jsa/jsa30.html#SmeetsWS90
>
rdfs:
seeAlso
<
https://doi.org/10.1016/0165-6074(90)90315-Z
>
dc:
title
Pipelining a memory based CISC processor.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:Article
rdf:
type
foaf:Document
swrc:
volume
30
(xsd:string)