A Memory-Efficient Parallel String Matching Architecture for High-Speed Intrusion Detection.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/jsac/LuZLZL06
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2006
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A Memory-Efficient Parallel String Matching Architecture for High-Speed Intrusion Detection.
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A Memory-Efficient Parallel String Matching Architecture for High-Speed Intrusion Detection.
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