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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/jsac/YamanakaKSY90>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Masao_Suzuki>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Naoaki_Yamanaka>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Shiro_Kikuchi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yukiharu_Yoshioka>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2F49.62833>
foaf:homepage <https://doi.org/10.1109/49.62833>
dc:identifier DBLP journals/jsac/YamanakaKSY90 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2F49.62833 (xsd:string)
dcterms:issued 1990 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/jsac>
rdfs:label A 2 Gb/s Expandable Space-Division Switching LSI and Network Architecture for Gigabit-Rate Broad-Band Circuit Switching. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Masao_Suzuki>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Naoaki_Yamanaka>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Shiro_Kikuchi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yukiharu_Yoshioka>
swrc:number 8 (xsd:string)
swrc:pages 1543-1550 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/jsac/YamanakaKSY90/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/jsac/YamanakaKSY90>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/jsac/jsac8.html#YamanakaKSY90>
rdfs:seeAlso <https://doi.org/10.1109/49.62833>
dc:title A 2 Gb/s Expandable Space-Division Switching LSI and Network Architecture for Gigabit-Rate Broad-Band Circuit Switching. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 8 (xsd:string)