Compiler-assisted leakage-aware loop scheduling for embedded VLIW DSP processors.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/jss/WangWLQS10
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Compiler-assisted leakage-aware loop scheduling for embedded VLIW DSP processors.
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Compiler-assisted leakage-aware loop scheduling for embedded VLIW DSP processors.
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