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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/jssc/AgarwalPMR05>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Amit_Agarwal_0001>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Bipul_C._Paul>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Kaushik_Roy_0001>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Saibal_Mukhopadhyay>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FJSSC.2005.852159>
foaf:homepage <https://doi.org/10.1109/JSSC.2005.852159>
dc:identifier DBLP journals/jssc/AgarwalPMR05 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FJSSC.2005.852159 (xsd:string)
dcterms:issued 2005 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/jssc>
rdfs:label Process variation in embedded memories: failure analysis and variation aware architecture. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Amit_Agarwal_0001>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Bipul_C._Paul>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Kaushik_Roy_0001>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Saibal_Mukhopadhyay>
swrc:number 9 (xsd:string)
swrc:pages 1804-1814 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/jssc/AgarwalPMR05/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/jssc/AgarwalPMR05>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/jssc/jssc40.html#AgarwalPMR05>
rdfs:seeAlso <https://doi.org/10.1109/JSSC.2005.852159>
dc:title Process variation in embedded memories: failure analysis and variation aware architecture. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 40 (xsd:string)