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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/jssc/ItoNOSNYIKKKHAK09>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Kenichi_Nitta>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Koji_Ohno>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Masahito_Saigusa>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Masaki_Nishida>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Masayuki_Ito>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Shinichi_Yoshioka>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Takahiro_Irita>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Takao_Koike>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Tatsuya_Kamei>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Teruyoshi_Komuro>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Toshihiro_Hattori>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yasuhiro_Arai>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yukio_Kodama>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FJSSC.2008.2007169>
foaf:homepage <https://doi.org/10.1109/JSSC.2008.2007169>
dc:identifier DBLP journals/jssc/ItoNOSNYIKKKHAK09 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FJSSC.2008.2007169 (xsd:string)
dcterms:issued 2009 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/jssc>
rdfs:label A 65 nm Single-Chip Application and Dual-Mode Baseband Processor With Partial Clock Activation and IP-MMU. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Kenichi_Nitta>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Koji_Ohno>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Masahito_Saigusa>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Masaki_Nishida>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Masayuki_Ito>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Shinichi_Yoshioka>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Takahiro_Irita>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Takao_Koike>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Tatsuya_Kamei>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Teruyoshi_Komuro>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Toshihiro_Hattori>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yasuhiro_Arai>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yukio_Kodama>
swrc:number 1 (xsd:string)
swrc:pages 83-89 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/jssc/ItoNOSNYIKKKHAK09/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/jssc/ItoNOSNYIKKKHAK09>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/jssc/jssc44.html#ItoNOSNYIKKKHAK09>
rdfs:seeAlso <https://doi.org/10.1109/JSSC.2008.2007169>
dc:title A 65 nm Single-Chip Application and Dual-Mode Baseband Processor With Partial Clock Activation and IP-MMU. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 44 (xsd:string)