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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/jssc/JiangLMM22>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Man-Kay_Law>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Pui-In_Mak>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Rui_Paulo_Martins>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yang_Jiang_0002>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FJSSC.2022.3167704>
foaf:homepage <https://doi.org/10.1109/JSSC.2022.3167704>
dc:identifier DBLP journals/jssc/JiangLMM22 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FJSSC.2022.3167704 (xsd:string)
dcterms:issued 2022 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/jssc>
rdfs:label Arithmetic Progression Switched-Capacitor DC-DC Converter Topology With Soft VCR Transitions and Quasi-Symmetric Two-Phase Charge Delivery. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Man-Kay_Law>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Pui-In_Mak>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Rui_Paulo_Martins>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yang_Jiang_0002>
swrc:number 10 (xsd:string)
swrc:pages 2919-2933 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/jssc/JiangLMM22/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/jssc/JiangLMM22>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/jssc/jssc57.html#JiangLMM22>
rdfs:seeAlso <https://doi.org/10.1109/JSSC.2022.3167704>
dc:title Arithmetic Progression Switched-Capacitor DC-DC Converter Topology With Soft VCR Transitions and Quasi-Symmetric Two-Phase Charge Delivery. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 57 (xsd:string)