Variation-Tolerant, Ultra-Low-Voltage Microprocessor With a Low-Overhead, Within-a-Cycle In-Situ Timing-Error Detection and Correction Technique. | D2R Server publishing the DBLP Bibliography Database, hosted at L3S Research Center

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dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Seongjong_Kim>
foaf:homepage	<http://dx.doi.org/doi.org%2F10.1109%2FJSSC.2015.2418713>
foaf:homepage	<https://doi.org/10.1109/JSSC.2015.2418713>
dc:identifier	DBLP journals/jssc/KimS15 (xsd:string)
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dc:title	Variation-Tolerant, Ultra-Low-Voltage Microprocessor With a Low-Overhead, Within-a-Cycle In-Situ Timing-Error Detection and Correction Technique. (xsd:string)
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