Architecture and Physical Implementation of a Third Generation 65 nm, 16 Core, 32 Thread Chip-Multithreading SPARC Processor.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/jssc/KonstadinidisTC09
Home
|
Example Publications
Property
Value
dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/journals/jssc/KonstadinidisTC09
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Georgios_K._Konstadinidis
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Ilyas_Elkin
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Ishwar_Parulkar
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Leonard_Rarick
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Mamun_Rashid
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Marc_Tremblay
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Mark_Steigerwald
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Peter_F._Lai
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Rambabu_Pyapali
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Shailender_Chaudhry
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Shriram_Gundala
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Sudhendra_Parampalli
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Yannis_Orginos
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Yuefei_Ge
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Yukio_Otaguro
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1109%2FJSSC.2008.2007144
>
foaf:
homepage
<
https://doi.org/10.1109/JSSC.2008.2007144
>
dc:
identifier
DBLP journals/jssc/KonstadinidisTC09
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1109%2FJSSC.2008.2007144
(xsd:string)
dcterms:
issued
2009
(xsd:gYear)
swrc:
journal
<
https://dblp.l3s.de/d2r/resource/journals/jssc
>
rdfs:
label
Architecture and Physical Implementation of a Third Generation 65 nm, 16 Core, 32 Thread Chip-Multithreading SPARC Processor.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Georgios_K._Konstadinidis
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Ilyas_Elkin
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Ishwar_Parulkar
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Leonard_Rarick
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Mamun_Rashid
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Marc_Tremblay
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Mark_Steigerwald
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Peter_F._Lai
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Rambabu_Pyapali
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Shailender_Chaudhry
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Shriram_Gundala
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Sudhendra_Parampalli
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Yannis_Orginos
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Yuefei_Ge
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Yukio_Otaguro
>
swrc:
number
1
(xsd:string)
swrc:
pages
7-17
(xsd:string)
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/journals/jssc/KonstadinidisTC09/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/journals/jssc/KonstadinidisTC09
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/journals/jssc/jssc44.html#KonstadinidisTC09
>
rdfs:
seeAlso
<
https://doi.org/10.1109/JSSC.2008.2007144
>
dc:
title
Architecture and Physical Implementation of a Third Generation 65 nm, 16 Core, 32 Thread Chip-Multithreading SPARC Processor.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:Article
rdf:
type
foaf:Document
swrc:
volume
44
(xsd:string)