A 10.1-ENOB, 6.2-fJ/conv.-step, 500-MS/s, Ringamp-Based Pipelined-SAR ADC With Background Calibration and Dynamic Reference Regulation in 16-nm CMOS. | D2R Server publishing the DBLP Bibliography Database, hosted at L3S Research Center

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dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Benjamin_P._Hershberg>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Davide_Dermit>
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dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Nereo_Markulic>
foaf:homepage	<http://dx.doi.org/doi.org%2F10.1109%2FJSSC.2021.3133829>
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dc:title	A 10.1-ENOB, 6.2-fJ/conv.-step, 500-MS/s, Ringamp-Based Pipelined-SAR ADC With Background Calibration and Dynamic Reference Regulation in 16-nm CMOS. (xsd:string)
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