Design of 56 Gb/s NRZ and PAM4 SerDes Transceivers in CMOS Technologies.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/jssc/LeeCPCW15
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Design of 56 Gb/s NRZ and PAM4 SerDes Transceivers in CMOS Technologies.
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Design of 56 Gb/s NRZ and PAM4 SerDes Transceivers in CMOS Technologies.
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