Bipolar Transistor Excess Phase Modeling in Verilog-A. | D2R Server publishing the DBLP Bibliography Database, hosted at L3S Research Center

Property	Value
dcterms:bibliographicCitation	<http://dblp.uni-trier.de/rec/bibtex/journals/jssc/McAndrewHC09>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Colin_C._McAndrew>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Geoffrey_J._Coram>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Zoltan_Huszka>
foaf:homepage	<http://dx.doi.org/doi.org%2F10.1109%2FJSSC.2009.2022667>
foaf:homepage	<https://doi.org/10.1109/JSSC.2009.2022667>
dc:identifier	DBLP journals/jssc/McAndrewHC09 (xsd:string)
dc:identifier	DOI doi.org%2F10.1109%2FJSSC.2009.2022667 (xsd:string)
dcterms:issued	2009 (xsd:gYear)
swrc:journal	<https://dblp.l3s.de/d2r/resource/journals/jssc>
rdfs:label	Bipolar Transistor Excess Phase Modeling in Verilog-A. (xsd:string)
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Colin_C._McAndrew>
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Geoffrey_J._Coram>
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Zoltan_Huszka>
swrc:number	9 (xsd:string)
swrc:pages	2267-2275 (xsd:string)
owl:sameAs	<http://bibsonomy.org/uri/bibtexkey/journals/jssc/McAndrewHC09/dblp>
owl:sameAs	<http://dblp.rkbexplorer.com/id/journals/jssc/McAndrewHC09>
rdfs:seeAlso	<http://dblp.uni-trier.de/db/journals/jssc/jssc44.html#McAndrewHC09>
rdfs:seeAlso	<https://doi.org/10.1109/JSSC.2009.2022667>
dc:title	Bipolar Transistor Excess Phase Modeling in Verilog-A. (xsd:string)
dc:type	<http://purl.org/dc/dcmitype/Text>
rdf:type	swrc:Article
rdf:type	foaf:Document
swrc:volume	44 (xsd:string)