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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/jssc/NonisGSCD13>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Dmytro_Cherniak>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Nicola_Da_Dalt>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Roberto_Nonis>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Thomas_Santa>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Werner_Grollitsch>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FJSSC.2013.2272340>
foaf:homepage <https://doi.org/10.1109/JSSC.2013.2272340>
dc:identifier DBLP journals/jssc/NonisGSCD13 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FJSSC.2013.2272340 (xsd:string)
dcterms:issued 2013 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/jssc>
rdfs:label digPLL-Lite: A Low-Complexity, Low-Jitter Fractional-N Digital PLL Architecture. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Dmytro_Cherniak>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Nicola_Da_Dalt>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Roberto_Nonis>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Thomas_Santa>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Werner_Grollitsch>
swrc:number 12 (xsd:string)
swrc:pages 3134-3145 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/jssc/NonisGSCD13/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/jssc/NonisGSCD13>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/jssc/jssc48.html#NonisGSCD13>
rdfs:seeAlso <https://doi.org/10.1109/JSSC.2013.2272340>
dc:title digPLL-Lite: A Low-Complexity, Low-Jitter Fractional-N Digital PLL Architecture. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 48 (xsd:string)