A video DSP with a macroblock-level-pipeline and a SIMD type vector-pipeline architecture for MPEG2 CODEC.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/jssc/ToyokuraKMOGMOATAWA94
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A video DSP with a macroblock-level-pipeline and a SIMD type vector-pipeline architecture for MPEG2 CODEC.
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A video DSP with a macroblock-level-pipeline and a SIMD type vector-pipeline architecture for MPEG2 CODEC.
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