A Charge Domain SRAM Compute-in-Memory Macro With C-2C Ladder-Based 8-Bit MAC Unit in 22-nm FinFET Process for Edge Inference.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/jssc/WangLDDLC23
Home
|
Example Publications
Property
Value
dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/journals/jssc/WangLDDLC23
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Brent_R._Carlton
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Dan_Lake
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Deepak_Dasalukunte
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Hechen_Wang
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Renzhi_Liu
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Richard_Dorrance
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1109%2FJSSC.2022.3232601
>
foaf:
homepage
<
https://doi.org/10.1109/JSSC.2022.3232601
>
dc:
identifier
DBLP journals/jssc/WangLDDLC23
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1109%2FJSSC.2022.3232601
(xsd:string)
dcterms:
issued
2023
(xsd:gYear)
swrc:
journal
<
https://dblp.l3s.de/d2r/resource/journals/jssc
>
rdfs:
label
A Charge Domain SRAM Compute-in-Memory Macro With C-2C Ladder-Based 8-Bit MAC Unit in 22-nm FinFET Process for Edge Inference.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Brent_R._Carlton
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Dan_Lake
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Deepak_Dasalukunte
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Hechen_Wang
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Renzhi_Liu
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Richard_Dorrance
>
swrc:
number
4
(xsd:string)
swrc:
pages
1037-1050
(xsd:string)
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/journals/jssc/WangLDDLC23/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/journals/jssc/WangLDDLC23
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/journals/jssc/jssc58.html#WangLDDLC23
>
rdfs:
seeAlso
<
https://doi.org/10.1109/JSSC.2022.3232601
>
dc:
title
A Charge Domain SRAM Compute-in-Memory Macro With C-2C Ladder-Based 8-Bit MAC Unit in 22-nm FinFET Process for Edge Inference.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:Article
rdf:
type
foaf:Document
swrc:
volume
58
(xsd:string)