A Floating-Point 6T SRAM In-Memory-Compute Macro Using Hybrid-Domain Structure for Advanced AI Edge Chips.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/jssc/WuSHRCCKHLSLCLLHTC24
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dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/journals/jssc/WuSHRCCKHLSLCLLHTC24
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Chao-En_Ke
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Chih-Cheng_Hsieh
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Chih-Han_Chien
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Chung-Chuan_Lo
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Ho-Yu_Chen
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Hsu-Ming_Hsiao
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Jian-Wei_Su
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Jin-Sheng_Ren
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Kea-Tiong_Tang
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Li-Yang_Hong
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Meng-Fan_Chang
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Ping-Chun_Wu
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Ren-Shuo_Liu
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Shih-Chieh_Chang
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Shyh-Shyuan_Sheu
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Sih-Han_Li
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Wei-Chung_Lo
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1109%2FJSSC.2023.3309966
>
foaf:
homepage
<
https://doi.org/10.1109/JSSC.2023.3309966
>
dc:
identifier
DBLP journals/jssc/WuSHRCCKHLSLCLLHTC24
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1109%2FJSSC.2023.3309966
(xsd:string)
dcterms:
issued
2024
(xsd:gYear)
swrc:
journal
<
https://dblp.l3s.de/d2r/resource/journals/jssc
>
rdfs:
label
A Floating-Point 6T SRAM In-Memory-Compute Macro Using Hybrid-Domain Structure for Advanced AI Edge Chips.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Chao-En_Ke
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Chih-Cheng_Hsieh
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Chih-Han_Chien
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Chung-Chuan_Lo
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Ho-Yu_Chen
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Hsu-Ming_Hsiao
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Jian-Wei_Su
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Jin-Sheng_Ren
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Kea-Tiong_Tang
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Li-Yang_Hong
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Meng-Fan_Chang
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Ping-Chun_Wu
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Ren-Shuo_Liu
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Shih-Chieh_Chang
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Shyh-Shyuan_Sheu
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Sih-Han_Li
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Wei-Chung_Lo
>
swrc:
month
January
(xsd:string)
swrc:
number
1
(xsd:string)
swrc:
pages
196-207
(xsd:string)
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/journals/jssc/WuSHRCCKHLSLCLLHTC24/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/journals/jssc/WuSHRCCKHLSLCLLHTC24
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/journals/jssc/jssc59.html#WuSHRCCKHLSLCLLHTC24
>
rdfs:
seeAlso
<
https://doi.org/10.1109/JSSC.2023.3309966
>
dc:
title
A Floating-Point 6T SRAM In-Memory-Compute Macro Using Hybrid-Domain Structure for Advanced AI Edge Chips.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:Article
rdf:
type
foaf:Document
swrc:
volume
59
(xsd:string)