A Sub-0.25-pJ/bit 47.6-to-58.8-Gb/s Reference-Less FD-Less Single-Loop PAM-4 Bang-Bang CDR With a Deliberate-Current-Mismatch Frequency Acquisition Technique in 28-nm CMOS. | D2R Server publishing the DBLP Bibliography Database, hosted at L3S Research Center

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dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Franco_Maloberti>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Lin_Wang>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Pui-In_Mak>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Rui_Paulo_Martins>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Xiaoteng_Zhao>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Yong_Chen_0005>
foaf:homepage	<http://dx.doi.org/doi.org%2F10.1109%2FJSSC.2022.3140778>
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rdfs:label	A Sub-0.25-pJ/bit 47.6-to-58.8-Gb/s Reference-Less FD-Less Single-Loop PAM-4 Bang-Bang CDR With a Deliberate-Current-Mismatch Frequency Acquisition Technique in 28-nm CMOS. (xsd:string)
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foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Rui_Paulo_Martins>
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Xiaoteng_Zhao>
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dc:title	A Sub-0.25-pJ/bit 47.6-to-58.8-Gb/s Reference-Less FD-Less Single-Loop PAM-4 Bang-Bang CDR With a Deliberate-Current-Mismatch Frequency Acquisition Technique in 28-nm CMOS. (xsd:string)
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