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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/mam/DurraniR17a>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1016%2Fj.micpro.2017.11.007>
foaf:homepage <https://doi.org/10.1016/j.micpro.2017.11.007>
dc:identifier DBLP journals/mam/DurraniR17a (xsd:string)
dc:identifier DOI doi.org%2F10.1016%2Fj.micpro.2017.11.007 (xsd:string)
dcterms:issued 2017 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/mam>
rdfs:label Retraction notice to 'Power Modeling for High Performance Network-on-Chip Architectures' [Microprocessors and Microsystems 50 (2017) 80-89]. (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/mam/DurraniR17a/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/mam/DurraniR17a>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/mam/mam50.html#DurraniR17a>
rdfs:seeAlso <https://doi.org/10.1016/j.micpro.2017.11.007>
dc:title Retraction notice to 'Power Modeling for High Performance Network-on-Chip Architectures' [Microprocessors and Microsystems 50 (2017) 80-89]. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 50 (xsd:string)