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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/mam/PaulCG16>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Amlan_Chakrabarti>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ranjan_Ghosh>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Rourab_Paul>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1016%2Fj.micpro.2015.08.003>
foaf:homepage <https://doi.org/10.1016/j.micpro.2015.08.003>
dc:identifier DBLP journals/mam/PaulCG16 (xsd:string)
dc:identifier DOI doi.org%2F10.1016%2Fj.micpro.2015.08.003 (xsd:string)
dcterms:issued 2016 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/mam>
rdfs:label Multi core SSL/TLS security processor architecture and its FPGA prototype design with automated preferential algorithm. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Amlan_Chakrabarti>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ranjan_Ghosh>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Rourab_Paul>
swrc:pages 124-136 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/mam/PaulCG16/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/mam/PaulCG16>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/mam/mam40.html#PaulCG16>
rdfs:seeAlso <https://doi.org/10.1016/j.micpro.2015.08.003>
dc:title Multi core SSL/TLS security processor architecture and its FPGA prototype design with automated preferential algorithm. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 40 (xsd:string)