[RDF data]
Home | Example Publications
PropertyValue
dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/mam/PunithaS20>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/J._Sundararajan>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/L._Punitha>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1016%2Fj.micpro.2020.103098>
foaf:homepage <https://doi.org/10.1016/j.micpro.2020.103098>
dc:identifier DBLP journals/mam/PunithaS20 (xsd:string)
dc:identifier DOI doi.org%2F10.1016%2Fj.micpro.2020.103098 (xsd:string)
dcterms:issued 2020 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/mam>
rdfs:label FPGA based design and implementation of low power dual edge triggered flipflop using dynamic signal driving scheme for memory applications. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/J._Sundararajan>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/L._Punitha>
swrc:pages 103098 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/mam/PunithaS20/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/mam/PunithaS20>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/mam/mam76.html#PunithaS20>
rdfs:seeAlso <https://doi.org/10.1016/j.micpro.2020.103098>
dc:title FPGA based design and implementation of low power dual edge triggered flipflop using dynamic signal driving scheme for memory applications. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 76 (xsd:string)