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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/micro/HoriHNK09>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jun_Nishimura>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Tadahiro_Kuroda>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yuichi_Hori>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yuya_Hanai>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FMM.2009.93>
foaf:homepage <https://doi.org/10.1109/MM.2009.93>
dc:identifier DBLP journals/micro/HoriHNK09 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FMM.2009.93 (xsd:string)
dcterms:issued 2009 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/micro>
rdfs:label Architecture Design of Versatile Recognition Processor for Sensornet Applications. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jun_Nishimura>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Tadahiro_Kuroda>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yuichi_Hori>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yuya_Hanai>
swrc:number 6 (xsd:string)
swrc:pages 44-57 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/micro/HoriHNK09/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/micro/HoriHNK09>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/micro/micro29.html#HoriHNK09>
rdfs:seeAlso <https://doi.org/10.1109/MM.2009.93>
dc:title Architecture Design of Versatile Recognition Processor for Sensornet Applications. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 29 (xsd:string)