A floating-point VLSI chip for the TRON architecture: an architecture for reliable numerical programming.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/micro/KawasakiWM89
Home
|
Example Publications
Property
Value
dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/journals/micro/KawasakiWM89
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Mitsuru_Watabe
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Shigeki_Morinaga
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Shumpei_Kawasaki
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1109%2F40.31476
>
foaf:
homepage
<
https://doi.org/10.1109/40.31476
>
dc:
identifier
DBLP journals/micro/KawasakiWM89
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1109%2F40.31476
(xsd:string)
dcterms:
issued
1989
(xsd:gYear)
swrc:
journal
<
https://dblp.l3s.de/d2r/resource/journals/micro
>
rdfs:
label
A floating-point VLSI chip for the TRON architecture: an architecture for reliable numerical programming.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Mitsuru_Watabe
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Shigeki_Morinaga
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Shumpei_Kawasaki
>
swrc:
number
3
(xsd:string)
swrc:
pages
26-44
(xsd:string)
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/journals/micro/KawasakiWM89/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/journals/micro/KawasakiWM89
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/journals/micro/micro9.html#KawasakiWM89
>
rdfs:
seeAlso
<
https://doi.org/10.1109/40.31476
>
dc:
title
A floating-point VLSI chip for the TRON architecture: an architecture for reliable numerical programming.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:Article
rdf:
type
foaf:Document
swrc:
volume
9
(xsd:string)