On-Chip Interconnection Architecture of the Tile Processor.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/micro/WentzlaffGHBERMMBA07
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On-Chip Interconnection Architecture of the Tile Processor.
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MIMD processors, on-chip interconnection networks, multicore architectures, mesh networks, parallel architectures
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On-Chip Interconnection Architecture of the Tile Processor.
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