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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/mj/BheemanaJYV22>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Aditya_Japa>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ramesh_Vaddi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Renuka_Chowdary_Bheemana>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Siva_Sankar_Yellampalli>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1016%2Fj.mejo.2021.105320>
foaf:homepage <https://doi.org/10.1016/j.mejo.2021.105320>
dc:identifier DBLP journals/mj/BheemanaJYV22 (xsd:string)
dc:identifier DOI doi.org%2F10.1016%2Fj.mejo.2021.105320 (xsd:string)
dcterms:issued 2022 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/mj>
rdfs:label Negative capacitance FETs for energy efficient and hardware secure logic designs. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Aditya_Japa>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ramesh_Vaddi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Renuka_Chowdary_Bheemana>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Siva_Sankar_Yellampalli>
swrc:pages 105320 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/mj/BheemanaJYV22/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/mj/BheemanaJYV22>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/mj/mj119.html#BheemanaJYV22>
rdfs:seeAlso <https://doi.org/10.1016/j.mejo.2021.105320>
dc:title Negative capacitance FETs for energy efficient and hardware secure logic designs. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 119 (xsd:string)