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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/mj/Garcia-LeyvaAGCMR11>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Antonio_Calomarde>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Antonio_Rubio_0001>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Dennis_Andrade>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Francesc_Moll>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Lancelot_Garcia-Leyva>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sergio_G%E2%88%9A%E2%89%A5mez>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1016%2Fj.mejo.2011.09.007>
foaf:homepage <https://doi.org/10.1016/j.mejo.2011.09.007>
dc:identifier DBLP journals/mj/Garcia-LeyvaAGCMR11 (xsd:string)
dc:identifier DOI doi.org%2F10.1016%2Fj.mejo.2011.09.007 (xsd:string)
dcterms:issued 2011 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/mj>
rdfs:label New redundant logic design concept for high noise and low voltage scenarios. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Antonio_Calomarde>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Antonio_Rubio_0001>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Dennis_Andrade>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Francesc_Moll>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Lancelot_Garcia-Leyva>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Sergio_G%E2%88%9A%E2%89%A5mez>
swrc:number 12 (xsd:string)
swrc:pages 1359-1369 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/mj/Garcia-LeyvaAGCMR11/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/mj/Garcia-LeyvaAGCMR11>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/mj/mj42.html#Garcia-LeyvaAGCMR11>
rdfs:seeAlso <https://doi.org/10.1016/j.mejo.2011.09.007>
dc:title New redundant logic design concept for high noise and low voltage scenarios. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 42 (xsd:string)