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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/mj/JacquemodGNFTV08>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Benjamin_Nicolle>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Emeric_de_Foucauld>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Gilles_Jacquemod>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Lionel_Geynet>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Pierre_Vincent>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/William_Tatinian>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1016%2Fj.mejo.2008.01.069>
foaf:homepage <https://doi.org/10.1016/j.mejo.2008.01.069>
dc:identifier DBLP journals/mj/JacquemodGNFTV08 (xsd:string)
dc:identifier DOI doi.org%2F10.1016%2Fj.mejo.2008.01.069 (xsd:string)
dcterms:issued 2008 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/mj>
rdfs:label Design and modelling of a multi-standard fractional PLL in CMOS/SOI technology. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Benjamin_Nicolle>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Emeric_de_Foucauld>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Gilles_Jacquemod>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Lionel_Geynet>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Pierre_Vincent>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/William_Tatinian>
swrc:number 9 (xsd:string)
swrc:pages 1130-1139 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/mj/JacquemodGNFTV08/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/mj/JacquemodGNFTV08>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/mj/mj39.html#JacquemodGNFTV08>
rdfs:seeAlso <https://doi.org/10.1016/j.mejo.2008.01.069>
dc:title Design and modelling of a multi-standard fractional PLL in CMOS/SOI technology. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 39 (xsd:string)