Parameter variation aware hybrid TFET-CMOS based power gating technique with a temperature variation tolerant sleep mode.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/mj/MishraJP14
Home
|
Example Publications
Property
Value
dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/journals/mj/MishraJP14
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Abhishek_Mishra
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Kamal_Kishor_Jha
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Manisha_Pattanaik
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1016%2Fj.mejo.2014.08.005
>
foaf:
homepage
<
https://doi.org/10.1016/j.mejo.2014.08.005
>
dc:
identifier
DBLP journals/mj/MishraJP14
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1016%2Fj.mejo.2014.08.005
(xsd:string)
dcterms:
issued
2014
(xsd:gYear)
swrc:
journal
<
https://dblp.l3s.de/d2r/resource/journals/mj
>
rdfs:
label
Parameter variation aware hybrid TFET-CMOS based power gating technique with a temperature variation tolerant sleep mode.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Abhishek_Mishra
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Kamal_Kishor_Jha
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Manisha_Pattanaik
>
swrc:
number
11
(xsd:string)
swrc:
pages
1515-1521
(xsd:string)
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/journals/mj/MishraJP14/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/journals/mj/MishraJP14
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/journals/mj/mj45.html#MishraJP14
>
rdfs:
seeAlso
<
https://doi.org/10.1016/j.mejo.2014.08.005
>
dc:
title
Parameter variation aware hybrid TFET-CMOS based power gating technique with a temperature variation tolerant sleep mode.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:Article
rdf:
type
foaf:Document
swrc:
volume
45
(xsd:string)