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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/mj/MoldovanLI15>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Benjam%E2%88%9A%E2%89%A0n_I%E2%88%9A%C4%AA%E2%88%9A%E2%89%A0guez>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Fran%E2%88%9A%C3%9Fois_Lime>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Oana_Moldovan>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1016%2Fj.mejo.2015.09.009>
foaf:homepage <https://doi.org/10.1016/j.mejo.2015.09.009>
dc:identifier DBLP journals/mj/MoldovanLI15 (xsd:string)
dc:identifier DOI doi.org%2F10.1016%2Fj.mejo.2015.09.009 (xsd:string)
dcterms:issued 2015 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/mj>
rdfs:label A complete and Verilog-A compatible Gate-All-Around long-channel junctionless MOSFET model implemented in CMOS inverters. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Benjam%E2%88%9A%E2%89%A0n_I%E2%88%9A%C4%AA%E2%88%9A%E2%89%A0guez>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Fran%E2%88%9A%C3%9Fois_Lime>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Oana_Moldovan>
swrc:number 11 (xsd:string)
swrc:pages 1069-1072 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/mj/MoldovanLI15/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/mj/MoldovanLI15>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/mj/mj46.html#MoldovanLI15>
rdfs:seeAlso <https://doi.org/10.1016/j.mejo.2015.09.009>
dc:title A complete and Verilog-A compatible Gate-All-Around long-channel junctionless MOSFET model implemented in CMOS inverters. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 46 (xsd:string)