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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/mr/ButzenBRR12>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Andr%E2%88%9A%C2%A9_In%E2%88%9A%C2%B0cio_Reis>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Paulo_F._Butzen>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Renato_P._Ribas>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Vin%E2%88%9A%E2%89%A0cius_Dal_Bem>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1016%2Fj.microrel.2012.06.092>
foaf:homepage <https://doi.org/10.1016/j.microrel.2012.06.092>
dc:identifier DBLP journals/mr/ButzenBRR12 (xsd:string)
dc:identifier DOI doi.org%2F10.1016%2Fj.microrel.2012.06.092 (xsd:string)
dcterms:issued 2012 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/mr>
rdfs:label Design of CMOS logic gates with enhanced robustness against aging degradation. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Andr%E2%88%9A%C2%A9_In%E2%88%9A%C2%B0cio_Reis>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Paulo_F._Butzen>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Renato_P._Ribas>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Vin%E2%88%9A%E2%89%A0cius_Dal_Bem>
swrc:number 9-10 (xsd:string)
swrc:pages 1822-1826 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/mr/ButzenBRR12/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/mr/ButzenBRR12>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/mr/mr52.html#ButzenBRR12>
rdfs:seeAlso <https://doi.org/10.1016/j.microrel.2012.06.092>
dc:title Design of CMOS logic gates with enhanced robustness against aging degradation. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 52 (xsd:string)