Effect of negative bias temperature instability induced by a low stress voltage on nanoscale high-k/metal gate pMOSFETs.
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Effect of negative bias temperature instability induced by a low stress voltage on nanoscale high-k/metal gate pMOSFETs.
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Effect of negative bias temperature instability induced by a low stress voltage on nanoscale high-k/metal gate pMOSFETs.
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