Single event double node upset tolerance in MOS/spintronic sequential and combinational logic circuits.
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dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/journals/mr/Rajaei17
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Ramin_Rajaei
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1016%2Fj.microrel.2016.12.003
>
foaf:
homepage
<
https://doi.org/10.1016/j.microrel.2016.12.003
>
dc:
identifier
DBLP journals/mr/Rajaei17
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1016%2Fj.microrel.2016.12.003
(xsd:string)
dcterms:
issued
2017
(xsd:gYear)
swrc:
journal
<
https://dblp.l3s.de/d2r/resource/journals/mr
>
rdfs:
label
Single event double node upset tolerance in MOS/spintronic sequential and combinational logic circuits.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Ramin_Rajaei
>
swrc:
pages
109-114
(xsd:string)
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/journals/mr/Rajaei17/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/journals/mr/Rajaei17
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/journals/mr/mr69.html#Rajaei17
>
rdfs:
seeAlso
<
https://doi.org/10.1016/j.microrel.2016.12.003
>
dc:
title
Single event double node upset tolerance in MOS/spintronic sequential and combinational logic circuits.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:Article
rdf:
type
foaf:Document
swrc:
volume
69
(xsd:string)