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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/mr/Stojcev06b>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Mile_K._Stojcev>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1016%2Fj.microrel.2005.06.012>
foaf:homepage <https://doi.org/10.1016/j.microrel.2005.06.012>
dc:identifier DBLP journals/mr/Stojcev06b (xsd:string)
dc:identifier DOI doi.org%2F10.1016%2Fj.microrel.2005.06.012 (xsd:string)
dcterms:issued 2006 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/mr>
rdfs:label S. Sutherland, S. Davidman and P. Flake, System Verilog for Design: A Guide to Using System Verilog for Hardware Design and Modeling Hardcover, Kluwer Academic Publishers, Norwell, MA (2004) ISBN 1-4020-7530-8 pp 374, plus XXVIII, euro 119. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Mile_K._Stojcev>
swrc:number 1 (xsd:string)
swrc:pages 198-199 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/mr/Stojcev06b/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/mr/Stojcev06b>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/mr/mr46.html#Stojcev06b>
rdfs:seeAlso <https://doi.org/10.1016/j.microrel.2005.06.012>
dc:title S. Sutherland, S. Davidman and P. Flake, System Verilog for Design: A Guide to Using System Verilog for Hardware Design and Modeling Hardcover, Kluwer Academic Publishers, Norwell, MA (2004) ISBN 1-4020-7530-8 pp 374, plus XXVIII, euro 119. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 46 (xsd:string)