Property | Value |
dcterms:bibliographicCitation
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<http://dblp.uni-trier.de/rec/bibtex/journals/mr/Stojcev06b>
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dc:creator
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<https://dblp.l3s.de/d2r/resource/authors/Mile_K._Stojcev>
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foaf:homepage
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<http://dx.doi.org/doi.org%2F10.1016%2Fj.microrel.2005.06.012>
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foaf:homepage
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<https://doi.org/10.1016/j.microrel.2005.06.012>
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dc:identifier
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DBLP journals/mr/Stojcev06b
(xsd:string)
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dc:identifier
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DOI doi.org%2F10.1016%2Fj.microrel.2005.06.012
(xsd:string)
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dcterms:issued
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2006
(xsd:gYear)
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swrc:journal
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<https://dblp.l3s.de/d2r/resource/journals/mr>
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rdfs:label
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S. Sutherland, S. Davidman and P. Flake, System Verilog for Design: A Guide to Using System Verilog for Hardware Design and Modeling Hardcover, Kluwer Academic Publishers, Norwell, MA (2004) ISBN 1-4020-7530-8 pp 374, plus XXVIII, euro 119.
(xsd:string)
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foaf:maker
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<https://dblp.l3s.de/d2r/resource/authors/Mile_K._Stojcev>
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swrc:number
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1
(xsd:string)
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swrc:pages
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198-199
(xsd:string)
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owl:sameAs
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<http://bibsonomy.org/uri/bibtexkey/journals/mr/Stojcev06b/dblp>
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owl:sameAs
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<http://dblp.rkbexplorer.com/id/journals/mr/Stojcev06b>
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rdfs:seeAlso
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<http://dblp.uni-trier.de/db/journals/mr/mr46.html#Stojcev06b>
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rdfs:seeAlso
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<https://doi.org/10.1016/j.microrel.2005.06.012>
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dc:title
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S. Sutherland, S. Davidman and P. Flake, System Verilog for Design: A Guide to Using System Verilog for Hardware Design and Modeling Hardcover, Kluwer Academic Publishers, Norwell, MA (2004) ISBN 1-4020-7530-8 pp 374, plus XXVIII, euro 119.
(xsd:string)
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dc:type
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<http://purl.org/dc/dcmitype/Text>
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rdf:type
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swrc:Article
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rdf:type
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foaf:Document
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swrc:volume
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46
(xsd:string)
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