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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/mva/DarabihaMR06>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ahmad_Darabiha>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jonathan_Rose>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/W._James_MacLean>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1007%2Fs00138-006-0018-2>
foaf:homepage <https://doi.org/10.1007/s00138-006-0018-2>
dc:identifier DBLP journals/mva/DarabihaMR06 (xsd:string)
dc:identifier DOI doi.org%2F10.1007%2Fs00138-006-0018-2 (xsd:string)
dcterms:issued 2006 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/mva>
rdfs:label Reconfigurable hardware implementation of a phase-correlation stereoalgorithm. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ahmad_Darabiha>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jonathan_Rose>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/W._James_MacLean>
swrc:number 2 (xsd:string)
swrc:pages 116-132 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/mva/DarabihaMR06/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/mva/DarabihaMR06>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/mva/mva17.html#DarabihaMR06>
rdfs:seeAlso <https://doi.org/10.1007/s00138-006-0018-2>
dc:subject Stereo disparity estimation; Frame rate implementation; Field Programmable Gate Arrays (FPGAs); Reconfigurable hardware implementation; Phase correlation (xsd:string)
dc:title Reconfigurable hardware implementation of a phase-correlation stereoalgorithm. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 17 (xsd:string)