A VLSI design of clock gated technique based ADC lock-in amplifier.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/saem/SarithaLARASSSV22
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A VLSI design of clock gated technique based ADC lock-in amplifier.
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A VLSI design of clock gated technique based ADC lock-in amplifier.
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