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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/scjapan/NakamaeIF00>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Hiromu_Fujioka>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Koji_Nakamae>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Takashi_Ishimura>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1002%2F1520-684X%28200007%2931%3A8%3C41%3A%3AAID-SCJ5%3E3.0.CO%3B2-E>
foaf:homepage <https://doi.org/10.1002/1520-684X(200007)31:8<41::AID-SCJ5>3.0.CO;2-E>
dc:identifier DBLP journals/scjapan/NakamaeIF00 (xsd:string)
dc:identifier DOI doi.org%2F10.1002%2F1520-684X%28200007%2931%3A8%3C41%3A%3AAID-SCJ5%3E3.0.CO%3B2-E (xsd:string)
dcterms:issued 2000 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/scjapan>
rdfs:label EB tester fault localization algorithm for combinational circuits by utilizing fault simulation and test pattern sequence for EB tester. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Hiromu_Fujioka>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Koji_Nakamae>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Takashi_Ishimura>
swrc:number 8 (xsd:string)
swrc:pages 41-48 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/scjapan/NakamaeIF00/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/scjapan/NakamaeIF00>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/scjapan/scjapan31.html#NakamaeIF00>
rdfs:seeAlso <https://doi.org/10.1002/1520-684X(200007)31:8<41::AID-SCJ5>3.0.CO;2-E>
dc:title EB tester fault localization algorithm for combinational circuits by utilizing fault simulation and test pattern sequence for EB tester. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 31 (xsd:string)