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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/sigarch/ZengYGP09>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Dmitry_Ponomarev_0001>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Hui_Zeng>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Kanad_Ghose>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Matt_T._Yourst>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F1577129.1577132>
foaf:homepage <https://doi.org/10.1145/1577129.1577132>
dc:identifier DBLP journals/sigarch/ZengYGP09 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F1577129.1577132 (xsd:string)
dcterms:issued 2009 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/sigarch>
rdfs:label MPTLsim: a cycle-accurate, full-system simulator for x86-64 multicore architectures with coherent caches. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Dmitry_Ponomarev_0001>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Hui_Zeng>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Kanad_Ghose>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Matt_T._Yourst>
swrc:number 2 (xsd:string)
swrc:pages 2-9 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/sigarch/ZengYGP09/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/sigarch/ZengYGP09>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/sigarch/sigarch37.html#ZengYGP09>
rdfs:seeAlso <https://doi.org/10.1145/1577129.1577132>
dc:title MPTLsim: a cycle-accurate, full-system simulator for x86-64 multicore architectures with coherent caches. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 37 (xsd:string)