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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/spic/HajiRassoulihaT18>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Amir_HajiRassouliha>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Andrew_J._Taberner>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Martyn_P._Nash>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Poul_M._F._Nielsen>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1016%2Fj.image.2018.07.007>
foaf:homepage <https://doi.org/10.1016/j.image.2018.07.007>
dc:identifier DBLP journals/spic/HajiRassoulihaT18 (xsd:string)
dc:identifier DOI doi.org%2F10.1016%2Fj.image.2018.07.007 (xsd:string)
dcterms:issued 2018 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/spic>
rdfs:label Suitability of recent hardware accelerators (DSPs, FPGAs, and GPUs) for computer vision and image processing algorithms. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Amir_HajiRassouliha>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Andrew_J._Taberner>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Martyn_P._Nash>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Poul_M._F._Nielsen>
swrc:pages 101-119 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/spic/HajiRassoulihaT18/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/spic/HajiRassoulihaT18>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/spic/spic68.html#HajiRassoulihaT18>
rdfs:seeAlso <https://doi.org/10.1016/j.image.2018.07.007>
dc:title Suitability of recent hardware accelerators (DSPs, FPGAs, and GPUs) for computer vision and image processing algorithms. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 68 (xsd:string)