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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/taco/GuoNB08>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Betul_Buyukkurt>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Walid_A._Najjar>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Zhi_Guo>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F1369396.1369402>
foaf:homepage <https://doi.org/10.1145/1369396.1369402>
dc:identifier DBLP journals/taco/GuoNB08 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F1369396.1369402 (xsd:string)
dcterms:issued 2008 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/taco>
rdfs:label Efficient hardware code generation for FPGAs. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Betul_Buyukkurt>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Walid_A._Najjar>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Zhi_Guo>
swrc:number 1 (xsd:string)
swrc:pages 6:1-6:26 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/taco/GuoNB08/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/taco/GuoNB08>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/taco/taco5.html#GuoNB08>
rdfs:seeAlso <https://doi.org/10.1145/1369396.1369402>
dc:subject FPGA, Reconfigurable computing, VHDL, data reuse, high-level synthesis (xsd:string)
dc:title Efficient hardware code generation for FPGAs. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 5 (xsd:string)