Compiler and hardware support for reducing the synchronization of speculative threads.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/taco/ZhaiSCM08
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2008
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Compiler and hardware support for reducing the synchronization of speculative threads.
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Thread-level speculation, automatic parallelization, chip-multiprocessing, instruction scheduling
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Compiler and hardware support for reducing the synchronization of speculative threads.
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